\abstract{Abstract}

At the laboratory of Computer Engineering of the
Faculty of Informationtechnology and Systems of the 
 Delft University of Technology, research has
been done in automating the design process of application specific
processors (ASPs). Within this so-called MOVE project a MOVE framework
was developed which shortens the design time of ASPs. With this MOVE
framework a MOVE processor can be designed. The MOVE processor
architecture is a VLIW-like transport triggered architecture
(TTA). The main advantages of this architecture are its flexibility
and scalability.

The software framework includes a generic front-end compiler, GCC and
its tools, and a back-end compiler. Research and implementation has
been done on the whole framework to make the architecture both
host-endianness independent and target-endianness independent. Also,
work has been done on the back-end to make it possible to schedule
long immediates (immediates which do not fit in the fixed-width
instruction) into the VLIW-like instruction stream.

To make the framework endianness independent, the GNU front-end was
altered to output either big-endian or little-endian code. The
back-end, our in-house developed scheduler and simulator, was altered
to compile and run correct on little-endian and big-endian hosts, and
the back-end was altered to be able to read the different binaries
made by the front-end and to be able to schedule and simulate the code
correctly, independent of the host.

To schedule long immediates in the instruction stream, an algorithm to
schedule these concurrently with the rest of the code has been
constructed and data structures to hold the state of the immediates
have been added to the scheduler. Where immediates used to be
scheduled in dedicated immediate fields concatenated to the normal
instruction word, now the immediates are scheduled in normal,
otherwise unoccupied move slots.  Care was taken that the routines and
data structures do not interfere with already existing other
algorithms in the scheduler. The algorithm increased the cycle count
by several percents, but made dedicated immediate fields, that can
take up 20\% of the instruction word length, obsolete.
