\chapter{Endianness related data structures}
\label{app:end}

This appendix contains excerpts of some scheduler data classes, with
emphasis on how they deal with endianness.


\section{SimMem}

{\small
\begin{verbatim}
class SimMem
{
public:
    virtual ~SimMem()	{ };
    virtual void WriteW(int, s32) = 0;
    virtual void WriteH(int, s16) = 0;
    virtual void WriteB(int, s8 ) = 0;
    virtual void WriteS(int, f32) = 0;
    virtual void WriteD(int, f64) = 0;
    virtual s32 ReadW(int) = 0;
    virtual s16 ReadH(int) = 0;
    virtual s8  ReadB(int) = 0;
    virtual f32 ReadS(int) = 0;
    virtual f64 ReadD(int) = 0;
...
protected:
#if SWAP_ENDIANESS
    s32 S(s32 data)		{ return SwapEndianess(data); }
    s16 S(s16 data)		{ return SwapEndianess(data); }
    f32 S(f32 data)		{ return SwapEndianess(data); }
    f64 S(f64 data)		{ return SwapEndianess(data); }
#else
    s32 S(s32 mem_data)		{ return mem_data; }
    s16 S(s16 mem_data)		{ return mem_data; }
    f32 S(f32 mem_data)		{ return mem_data; }
    f64 S(f64 mem_data)		{ return mem_data; }
#endif
};

// ########################################################################
//  Class SimMem_internal
// ########################################################################
//  Internal memory model used by the simulator.
// ########################################################################
class SimMem_internal : public SimMem
{
public:
    void WriteW(int addr, s32 mem_data)
	{ *(s32 *) Phys(addr) = S(mem_data); }
    void WriteH(int addr, s16 mem_data)
	{ *(s16 *) Phys(addr) = S(mem_data); }
    void WriteB(int addr, s8 mem_data)
	{ *(s8 *) Phys(addr) = mem_data; }
    void WriteS(int addr, f32 mem_data)
	{ *(f32 *) Phys(addr) = S(mem_data); }
    void WriteD(int addr, f64 mem_data)
	{
	    mem_data = S(mem_data);

	    ((int *) Phys(addr))[0] = ((int *) &mem_data)[0];
	    ((int *) Phys(addr))[1] = ((int *) &mem_data)[1];
	}
    s32 ReadW(int addr)
	{ return S(*(s32 *) Phys(addr)); }
    s16 ReadH(int addr)
	{ return S(*(s16 *) Phys(addr)); }
    s8 ReadB(int addr)
	{ return *(s8 *) Phys(addr); }
    f32 ReadS(int addr)
	{ return S(*(f32 *) Phys(addr)); }
    f64 ReadD(int addr)
    {
	f64 mem_data;

	((int *) &mem_data)[0] = ((int *) Phys(addr))[0];
	((int *) &mem_data)[1] = ((int *) Phys(addr))[1];

	return S(mem_data);
    }
...
}


\end{verbatim}
}%small

